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SP5070
2.GHz Fixed Modulus Frequency Synthesiser
DS3966-2.2 May 996
The SP5070 is a single modulus frequency synthesiser for use in Satellite TV receivers and together with an appropriate voltage controlled oscillator (VCO), forms a complete phase locked loop (PLL) synthesiser. The circuit consists of a prescaler with preamplifier and a fixed modulus divider. The phase comparator is fed with a reference frequency derived from an external oscillator or crystal. The comparator has a charge pump output amplifier stage around which feedback may be applied. Only an external transistor is required for varicap line driving.
VCC RF INPUT RF INPUT NC NC VEE DRIVE OUTPUT
1 2 3 4 5 6 7
14 13 12
TEST 1 TEST 2 NC CPDIS REF IN/CRYSTAL OSCILLATOR CAPACITOR CHARGE PUMP
SP5070
11 10 9 8
FEATURES s Low Power Consumption (5V, 47mA typ.) s Prescaler and Preamplifier Included s Charge Pump Amplifier with Feedback Point s Charge Pump Disable Facility s Synthesises Frequencies up to 2.4GHz s Pin and Function Compatible with SP5060 and SP5062 s Full ESD Protection*
* Normal ESD handling procedures should be observed.
DP14
VCC RF INPUT RF INPUT NC NC VEE DRIVE OUTPUT 1 2 3 4 5 6 7 14 13 12 11 TEST 1 TEST 2 NC CPDIS REF IN/CRYSTAL OSCILLATOR CAPACITOR CHARGE PUMP
SP5070F
10 9 8
APPLICATIONS s Satellite TV s High IF Cable Tuning Systems s C-Band with Frequency Doubling Mixer ORDERING INFORMATION
SP5070 DP SP5070F MP - (14 Lead Plastic Package) - (14 Lead Miniature Plastic Package)
Fig.1 Pin connections - top view
MP14
RF IN RF IN
2 3 PRE AMP PRESCALER /32
FIXED MODULUS DIVIDER /8192
8 PUMP FDIV PHASE COMP CHARGE PUMP 7 DRIVE
REFERENCE DIVIDER /1024
FCOMP
1 OUTPUT BUFFER 9 10 OSCILLATOR REF IN/ CAPACITOR CRYSTAL 14 13 11 CPDIS 6
V CC V EE
TEST 1 TEST 2
Fig.2 Block diagram of SP5070
SP5070
ELECTRICAL CHARACTERISTICS
Tamb = -40C to +85C,VCC = +4.5V to +5.5V. These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated. Characteristics Supply current Prescaler input voltage Prescaler input voltage Prescaler input impedance Input capacitance Charge pump output current Charge pump output leakage Drift due to leakage Charge pump drive output current Charge pump amplifier gain Symbol ICC Pin 1 2,3 2,3 2,3 2,3 8 8 7 Oscillator temperature stability Oscillator stability with supply voltage Reference clock frequency External reference amplitude Charge pump disable/TEST 1 and TEST 2/enable Charge pump disable leakage TEST 1/TEST 2 sink current TEST 1/TEST 2 leakage current TEST 1/TEST 2 voltage 9,10 9,10 10 10 11 11 13,14 13,14 13,14 2 150 -250 1 2 2 10 500 -500 10 10 VCC+0.3 ppm/C ppm/V MHz mVRMS A A mA A V VIN<0V V pin 11= VCC VOUT = 0.7V VOUT = VCC+0.3V Value Typ 47 50 2 100 6400 Units mA mVRMS mVRMS pF A nA mV/s mA V pin 8 = 2.0V V pin 8 = 2.0V At collector of External Varicap Drive transistor V pin 7 = 0.7V pin 7 current 100a Conditions VCC = 5V 300MHz to 1.8GHz sinewave 2.4GHz, see Fig.5
Min 50 100 1 -
Max 55 300 300 5 5 -
ABSOLUTE MAXIMUM RATINGS
All voltages are referred to VEE = 0V Value Characteristics Supply voltage RF input voltage RF input DC offset Charge pump DC offset Charge pump disable Drive DC offset Crystal oscillator DC offset TEST outputs Storage temperature Junction temperature DP14 thermal resistance, chip-to-ambient DP14 thermal resistance, chip-to-case MP14 thermal resistance, chip-to-ambient MP14 thermal resistance, chip-to-case Power consumption at 5.5V Pin 1 2,3 2,3 8 11 7 9,10 13,14 Min -0.3 -0.3 -0.3 -0.7 -0.3 -0.3 -0.3 -55 Max 7 2.5 VCC+0.3 VCC+0.3 VCC+0.3 VCC+0.3 VCC+0.3 VCC+0.3 150 +150 78 30 123 45 275 Units V Vp-p V V V V V V C C C/W C/W C/W C/W mW
2
SP5070
FUNCTIONAL DESCRIPTION
The SP5070, when used with a voltage controlled oscillator, forms a complete phase locked loop frequency synthesiser. The phase comparator comparison frequency is obtained by dividing the reference frequency. This may be generated on-chip by means of an external crystal, or from an external reference oscillator. The output of the prescaler is divided by the fixed modulus divider, producing an output frequency which is phased locked to the comparison frequency. The divider stages are arranged to give a fixed ratio between the synthesised frequency and the reference of 256:1. Any frequency within the range of 300MHz to 2.4GHz may be achieved by using the appropriate reference or crystal frequency. A single external transistor, driven from the charge pump output, provides the output drive necessary for the oscillator varicap line. A test facility which disables the charge pump is also provided. This is activated when a negative voltage is applied to pin 11, see electrical characteristics above. When the device is in this mode, FCOMP and FDIV are also available at outputs TEST1 and TEST2 respectively. These are open collector outputs and are each capable of sinking a minimum of 1mA. In normal mode of operation these outputs are high impedance. For compatibility with SP5060/SP5062, pin 11 may be connected toVCC
+5V FROM VCO 1n 1n
1 2 3 4 5 6 7 14
S P 5 0 7 0
13 12 11 10 9 8
180n
+30V 47n 22K
68p 47P
4MHz REFERENCE CRYSTAL
22K 2N3904
10K
VARICAP VCO 47K INPUT 10n
Fig.3 Typical application and test circuit (1024MHz with 4MHz reference crystal)
+5V FROM VCO 1n 1n
1 2 3 4 5 6 7 14
S P 5 0 7 0
13 12 11 10 9 8
100p
FROM REFERENCE OSCILLATOR
180n
+30V 47n 22K 10K VARICAP VCO 47K INPUT 10n
DP
22K 2N3904
Fig.4 Application using external reference oscillator
3
SP5070
S11:Z0 = 50
FREQUENCY MARKER STEP = 500MHz
Fig.5 Typical input sensitivity
Fig.6 Typical input impedance
RF input
Loop amplifier
Reference oscillator
TEST 1and TEST 2 outputs
Fig.7 SP5070 input/output interface circuits
4
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